Measurement-computing CIO-DAS160x/1x Instrukcja Użytkownika Pobierz pdf (Strona 3)

328.1 VOLTAGE DIVIDERS ........................................................

8 ANALOG ELECTRONICS .......................................................

317.2 CALIBRATING THE A/D & D/A CONVERTERS ..................................

317.1 REQUIRED EQUIPMENT .....................................................

7 CALIBRATION AND TEST ......................................................

306.1.15 BURST STATUS REGISTER ...............................................

306.1.14 DAS1600 MODE ENABLE REGISTER ......................................

296.1.13 BURST MODE ENABLE REGISTER ........................................

296.1.12 CONVERT DISABLE REGISTER ...........................................

276.1.11 24-bit DIGITAL I/O REGISTERS (not applicable on -P5 versions) .................

276.1.10 PACER CLOCK DATA & CONTROL REGISTERS .............................

266.1.9 PROGRAMMABLE GAIN CONTROL REGISTER / BURST RATE ..................

246.1.8 PACER CLOCK CONTROL REGISTER .......................................

246.1.7 DMA, INTERRUPT & TRIGGER CONTROL ...................................

236.1.6 STATUS REGISTER ......................................................

226.1.5 D/A REGISTERS .........................................................

226.1.4 FOUR BIT DIGITAL I/O REGISTERS ........................................

216.1.3 CHANNEL MUX SCAN LIMITS REGISTER ...................................

216.1.2 A/D DATA & CHANNEL REGISTERS (CIO-DAS1602/16) ........................

206.1.1 A/D DATA & CHANNEL REGISTERS (CIO-DAS1600/12) ........................

196.1 CONTROL & DATA REGISTERS ..............................................

6 REGISTER ARCHITECTURE ....................................................

175.3 ANALOG OUTPUTS .........................................................

175.2.7 Isolated Grounds / Differential Inputs ........................................

165.2.6 Isolated Grounds / Single-Ended Inputs .......................................

155.2.5 Common Mode Voltage > +/-10V ............................................

155.2.4 Common Mode Voltage < +/-10V / Differential Inputs ...........................

145.2.3 Common Mode Voltage < +/-10V / Single-Ended Inputs ..........................

145.2.2 Common Ground / Differential Inputs ........................................

145.2.1 Common Ground / Single-Ended Inputs .......................................

135.2 Wiring Configurations .........................................................

115.1.2 System Grounds and Isolation ...............................................

85.1.1 Single-Ended and Differential Inputs ..........................................

85.1 ANALOG INPUTS ............................................................

5 ANALOG CONNECTIONS ........................................................

74.2 DIGITAL I/O CONNECTOR (NOT APPLICABLE TO -P5 VERSIONS) .................

64.1 MAIN CONNECTOR DIAGRAM ................................................

4 CONNECTOR PINOUTS ..........................................................

53.9 DT-CONNECT ...............................................................

53.8 BURST MODE GENERATOR ...................................................

43.7 PACER EDGE SELECT ........................................................

33.6 BIPOLAR/UNIPOLAR AND GAIN SETTING ......................................

33.5 D/A CONVERTER REFERENCE JUMPER BLOCK .................................

23.4 8/16 CHANNEL SELECT .......................................................

23.3 1/10 MHz XTAL JUMPER ......................................................

23.2 DMA LEVEL SELECT .........................................................

13.1 BASE ADDRESS .............................................................

3 HARDWARE INSTALLATION ....................................................

2 SOFTWARE INSTALLATION .....................................................

1 INTRODUCTION ................................................................

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