
82C54 COUNTER 2 DATA
BASE ADDRESS +14
D0D1D2D3D4D5D6D7
01234567
The three 82C54 counter/timer data registers may be written to and read from. Because each counter can count to
65,535, loading or reading the counter data must be a multi-step process. The operation of the 82C54 is explained in the
Intel 82C54 data sheet.
82C54 COUNTER CONTROL
BASE ADDRESS +15
D0D1D2D3D4D5D6D7
01234567
This register controls the operation and loading/reading of the counters. The configuration of the 82C54 codes which
control the 82C54 chip is explained in the Intel 82C54 data sheet.
4.11 24-LINE DIGITAL I/O REGISTERS
PORT A DATA
BASE ADDRESS +16
A0A1A2A3A4A5A6A7
01234567
PORT B DATA
BASE ADDRESS +17
B0B1B2B3B4B5B6B7
01234567
Ports A and B may be programmed as input or output. Each is written to and read from in bytes, although for control and
monitoring purposes the individual bits are used.
Bit set/reset and bit read functions require that unwanted bits be masked out of reads and ORed into writes.
PORT C DATA
BASE ADDRESS +18
CL0CL1CL2CL3CH0CH1CH2CH3
C0C1C2C3C4C5C6C7
01234567
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