
Table of Contents
21
4 SPECIFICATIONS
.............................................
203.11 DIGITAL INPUT & OUTPUT ..................................
193.10 ANALOG INPUTS ...........................................
183.9 PACER CLOCK DATA & CONTROL REGISTERS .................
183.8 ANALOG INPUT RANGE REGISTER ............................
173.7 PACER CLOCK CONTROL REGISTER ..........................
163.6 DMA, INTERRUPT & TRIGGER CONTROL ......................
153.5 STATUS REGISTER ...........................................
143.4 4-BIT DIGITAL I/O REGISTERS ................................
133.3 CHANNEL MUX SCAN LIMITS REGISTER ......................
133.2.2 16-BIT BOARDS ........................................
123.2.1 12-BIT BOARDS ........................................
123.2 A/D DATA & CHANNEL REGISTERS ...........................
113.1 CONTROL & DATA REGISTERS ...............................
11
3 REGISTER ARCHITECTURE
......................................
102.6 DIGITAL OUTPUTS & INPUTS .................................
102.5 DIFFERENTIAL INPUT ........................................
82.4 FLOATING DIFFERENTIAL .....................................
82.3 SINGLE-ENDED ...............................................
72.2 ANALOG INPUTS .............................................
52.1 CONNECTOR DIAGRAM .......................................
5
2 SIGNAL CONNECTIONS
...........................................
41.7 INSTALLING THE BOARD .....................................
41.6 8/16 CHANNEL SELECT ........................................
31.5 1 OR 10 MHZ CRYSTAL OSCILLATOR JUMPER ..................
31.4 DMA LEVEL SELECT ..........................................
21.3 BASE ADDRESS ...............................................
11.2 HARDWARE ..................................................
11.1 SOFTWARE ...................................................
1
1 INSTALLATION
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