Measurement-computing PCI-DIO24/LP Instrukcja Użytkownika Pobierz pdf (Strona 11)

Chapter 3

Functional Details

The PCI-DIO24/LP board features the following:

 82C55 digital I/O chip interfaced to the PCI bus. The I/O pins of an 82C55 are bi-directional CMOS TTL

level.

 24-bits of digital I/O

 68-pin I/O connector

The 82C55 provides the 24-bit digital I/O channels into three eight-bit ports labeled Port A, Port B and Port C.

Port C is further divided into two four-bit ports—PORTCL and PORTCH. You can program each port for input

or output.

PCI-DIO24/LP block diagram

PCI-DIO24/LP functions are illustrated in the block diagram shown here.

PCI

CONTROLLER

BADR1

Boot

EEPROM

Control

Registers

Decode/Status

Bus

Timing

CONTROLLER FPGA and LOGIC

LOCAL BUS

PCI BUS (5V/3.3V, Universal 32-Bit, 33MHz)

CONTROL

BUS

PORT A

Control

PORT A (7:0)

82C55

Interrupt

Control

+5V

IRQ_INPUT

BADR2

Interrupt

IRQ_ENABLE

68-Pin I/O Connector

IRQ_INPUT

IRQ_ENABLE

PORT B (7:0)

PORT CH (3:0)

PORT B

PORT CH

PORT CL

PORT CL (3:0)

Figure 2. PCI-DIO24/LP functional block diagram

For more information on digital signal connections

For general information about digital signal connections and digital I/O techniques, refer to the Guide to Signal

Connections (available on our web site at www.mccdaq.com/signals/signals.pdf).

Caution! Do not connect high current/voltage devices directly to the PCI-DIO24/LP or you may damage the

board.

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