
5.0 CONTROL & DATA REGISTERS
Each PC104-DO48 is composed of parallel output chips. Each address contains one
latch and one buffer controlling eight output pins. The ports are arranged in sets of
three, with an intervening NA (not used) address. This scheme allows compatibility
with software written to control 82C55 based boards when the 82C55 is used as all
outputs. On those boards every fourth address contains a control register.
The first address, or BASE ADDRESS, is determined by setting a bank of switches on
the board.
To write a control data to an output register, the individual bits must be set to 0 or 1
then combined to form a Byte.
The registers and their function are listed on the following table.
NoneNoneBASE + 3, 7
Port C OutputNoneBASE + 2, 6
Port B OutputNoneBASE + 1, 5
Port A OutputNoneBASE + 0, 4
WRITE FUNCTIONREAD FUNCTIONADDRESS
There are two sets of digital output lines. Each set has 24 outputs that are divided into
three ports of eight lines each. An 8-bit register accesses each port. The register
addresses are given in the table above and the bit maps below.
PORT A DATA
BASE ADDRESS + 0, 4
A0A1A2A3A4A5A6A7
01234567
PORT B DATA
BASE ADDRESS + 1, 5
B0B1B2B3B4B5B6B7
01234567
PORT C DATA
BASE ADDRESS + 2, 6
C0C1C2C3C4C5C6C7
01234567
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